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I was born in 1996 in Yilan, Taiwan, and from an early age, I developed a deep passion for a wide range of knowledge domains. My childhood and teenage years were surrounded by books covering diverse topics, from economic trends and history to music and coffee.
I earned my B.S. and M.S. in Electronics Engineering from National Chiao Tung University, where my graduate research focused on phased-array design, PLL modeling, and satellite systems design.
During and after grad school I joined TronFutureTech, starting as a research engineer on S-Band anti-drone and X-Band communication payload development, then advancing to senior engineer on Ka/Ku-Band SATCOM user terminals and phased-array frontend design — with hands-on space-grade reliability verification including radiation testing, thermal cycling, vibration, and EMC compliance.
I then joined Qualcomm to work on RF calibration algorithm development (DPD, TPC, CPR), Wi-Fi 6/7 pre-silicon emulation, and post-silicon verification.
Currently I am a Senior System-Level Product Engineer at NVIDIA in the Silicon Co-Design Group, leading engineering studies and chip characterization reviews for N1X-class CPU and GB20X-class GPU programs.
Over the past year, I returned to deep hands-on engineering and expanded my AI stack, including Model Context Protocol (MCP) workflows for automation and agent-driven productivity.
I continue to build in blockchain (especially Polkadot), space infrastructure, and RF phased-array SATCOM. My current cross-domain thesis is: AI deployment from Earth to orbit, crypto-native infrastructure in space, and radiation-validated hardware paths for commercial compute in space environments.